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» Neural Compiler Technology for a Parallel Architecture
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DELTA
2010
IEEE
14 years 1 months ago
Notations for Multiphase Pipelines
— FPGAs, (Field-Programmable Gate Arrays) are often used for embedded image processing applications. Parallelism, and in particular pipelining, is the most suitable architecture ...
Christopher T. Johnston, Donald G. Bailey, Paul J....
CLUSTER
2002
IEEE
13 years 8 months ago
ZENTURIO: An Experiment Management System for Cluster and Grid Computing
The need to conduct and manage large sets of experiments for scientific applications dramatically increased over the last decade. However, there is still very little tool support ...
Radu Prodan, Thomas Fahringer
FIDJI
2003
Springer
14 years 1 months ago
Hard Real-Time Implementation of Embedded Software in JAVA
The popular slogan ”write once, run anywhere” effectively renders the expressive capabilities of the Java programming framework for developing, deploying, and reusing target-i...
Jean-Pierre Talpin, Abdoulaye Gamatié, Davi...
ICS
2010
Tsinghua U.
13 years 11 months ago
Speeding up Nek5000 with autotuning and specialization
Autotuning technology has emerged recently as a systematic process for evaluating alternative implementations of a computation, in order to select the best-performing solution for...
Jaewook Shin, Mary W. Hall, Jacqueline Chame, Chun...
IPPS
2009
IEEE
14 years 3 months ago
Annotation-based empirical performance tuning using Orio
In many scientific applications, significant time is spent tuning codes for a particular highperformance architecture. Tuning approaches range from the relatively nonintrusive (...
Albert Hartono, Boyana Norris, Ponnuswamy Sadayapp...