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CGO
2008
IEEE
15 years 10 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
CODES
2008
IEEE
15 years 10 months ago
Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
David Sheldon, Frank Vahid
147
Voted
ICDCS
2008
IEEE
15 years 10 months ago
PFC: Transparent Optimization of Existing Prefetching Strategies for Multi-Level Storage Systems
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...
Zhe Zhang, Kyuhyung Lee, Xiaosong Ma, Yuanyuan Zho...
144
Voted
ICDCS
2008
IEEE
15 years 10 months ago
Distributed Divide-and-Conquer Techniques for Effective DDoS Attack Defenses
Distributed Denial-of-Service (DDoS) attacks have emerged as a popular means of causing mass targeted service disruptions, often for extended periods of time. The relative ease an...
Muthusrinivasan Muthuprasanna, Govindarasu Manimar...
155
Voted
ICIP
2008
IEEE
15 years 10 months ago
Hardware-friendly descreening
Conventional electrophotographic printers tend to produce Moir´e artifacts when used for printing images scanned from printed material such as books and magazines. We propose a n...
Hasib Siddiqui, Mireille Boutin, Charles A. Bouman
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