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EMSOFT
2007
Springer
14 years 1 months ago
Loosely time-triggered architectures based on communication-by-sampling
We address the problem of mapping a set of processes which communicate synchronously on a distributed platform. The Time Triggered Architecture (TTA) proposed by Kopetz for the co...
Albert Benveniste, Paul Caspi, Marco Di Natale, Cl...
FPGA
2011
ACM
330views FPGA» more  FPGA 2011»
12 years 11 months ago
CoRAM: an in-fabric memory architecture for FPGA-based computing
FPGAs have been used in many applications to achieve orders-of-magnitude improvement in absolute performance and energy efficiency relative to conventional microprocessors. Despit...
Eric S. Chung, James C. Hoe, Ken Mai
IPPS
2010
IEEE
13 years 5 months ago
Tile QR factorization with parallel panel processing for multicore architectures
To exploit the potential of multicore architectures, recent dense linear algebra libraries have used tile algorithms, which consist in scheduling a Directed Acyclic Graph (DAG) of...
Bilel Hadri, Hatem Ltaief, Emmanuel Agullo, Jack D...
ISCC
2002
IEEE
108views Communications» more  ISCC 2002»
14 years 10 days ago
An integrated architecture for the scalable delivery of semi-dynamic Web content
The competition on clients attention requires sites to update their content frequently. As a result, a large percentage of web pages are semi-dynamic, i.e., change quite often and...
Danny Dolev, Osnat Mokryn, Yuval Shavitt, Innocent...
ICDS
2008
IEEE
14 years 1 months ago
Reliable Server Pooling - A Novel IETF Architecture for Availability-Sensitive Services
Reliable Server Pooling (RSerPool) is a light-weight protocol framework for server redundancy and session failover, currently still under standardization by the IETF RSerPool WG. ...
Thomas Dreibholz, Erwin P. Rathgeb