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» NoC-Based FPGA: Architecture and Routing
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FPGA
2000
ACM
141views FPGA» more  FPGA 2000»
14 years 5 days ago
Tolerating operational faults in cluster-based FPGAs
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
Vijay Lakamraju, Russell Tessier
NOCS
2007
IEEE
14 years 2 months ago
Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances
In this paper we present a new clustered mesh FPGA architecture where each cluster local interconnect is implemented as an MFPGA tree network [6]. Unlike previous clustered mesh a...
Zied Marrakchi, Hayder Mrabet, Christian Masson, H...
ICNP
2009
IEEE
14 years 3 months ago
Better by a HAIR: Hardware-Amenable Internet Routing
—Routing protocols are implemented in the form of software running on a general-purpose microprocessor. However, conventional software-based router architectures face significan...
Firat Kiyak, Brent Mochizuki, Eric Keller, Matthew...
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
14 years 1 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
VLSID
2005
IEEE
128views VLSI» more  VLSID 2005»
14 years 9 months ago
On-Line Synthesis for Partially Reconfigurable FPGAs
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
Renqiu Huang, Ranga Vemuri