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» Noise-tolerant dynamic circuit design
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VLSI
2010
Springer
13 years 4 months ago
A design workflow for dynamically reconfigurable multi-FPGA systems
Multi-FPGA systems (MFS's) represent a promising technology for various applications, such as the implementation of supercomputers and parallel and computational intensive emu...
Alessandro Panella, Marco D. Santambrogio, Frances...
ISLPED
2007
ACM
94views Hardware» more  ISLPED 2007»
13 years 11 months ago
Design of an efficient power delivery network in an soc to enable dynamic power management
Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabl...
Behnam Amelifard, Massoud Pedram
VLSID
2004
IEEE
128views VLSI» more  VLSID 2004»
14 years 10 months ago
A Compact Low-Power Buffer Amplifier with Dynamic Bias Control Technique
This work presents a novel dynamic bias control technique to verify the circuit performance of the lowpower rail-to-rail input/output buffer amplifier, which can be operating in s...
Chih-Jen Yen, Wen-Yaw Chung, Mely Chen Chi
DAC
2003
ACM
14 years 10 months ago
A TBR-based trajectory piecewise-linear algorithm for generating accurate low-order models for nonlinear analog circuits and MEM
In this paper we propose a method for generating reduced models for a class of nonlinear dynamical systems, based on truncated balanced realization (TBR) algorithm and a recently ...
Dmitry Vasilyev, Michal Rewienski, Jacob White
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
14 years 10 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood