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DAC
2005
ACM
13 years 10 months ago
Performance space modeling for hierarchical synthesis of analog integrated circuits
Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
Georges G. E. Gielen, Trent McConaghy, Tom Eeckela...
SIGGRAPH
1994
ACM
14 years 28 days ago
IRIS performer: a high performance multiprocessing toolkit for real-time 3D graphics
This paper describes the design and implementation of IRIS Performer, a toolkit for visual simulation, virtual reality, and other real-time 3D graphics applications. The principal...
John Rohlf, James Helman
DAC
2005
ACM
13 years 10 months ago
A combined feasibility and performance macromodel for analog circuits
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
Mengmeng Ding, Ranga Vemuri
MASCOTS
2004
13 years 10 months ago
Performance Engineering with the UML Profile for Schedulability, Performance and Time: A Case Study
We describe the application of a performance engineering methodology based on UML diagrams with annotations taken from the Profile for Schedulability, Performance and Time. The me...
Andrew J. Bennett, A. J. Field
IPPS
1998
IEEE
14 years 1 months ago
Performance and Experience with LAPI - a New High-Performance Communication Library for the IBM RS/6000 SP
LAPI is a low-level, high-performance communication interface available on the IBM RS/6000 SP system. It provides an activemessage-like interface along with remote memory copy and...
Gautam Shah, Jarek Nieplocha, Jamshed H. Mirza, Ch...