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CORR
2006
Springer
99views Education» more  CORR 2006»
13 years 9 months ago
Intermediate Performance of Rateless Codes
Abstract-- Fountain codes are designed so that all input symbols can be recovered from a slightly larger number of coded symbols, with high probability using an iterative decoder. ...
Sujay Sanghavi
CAL
2006
13 years 9 months ago
Performance modeling using Monte Carlo simulation
Abstract-- Cycle accurate simulation has long been the primary tool for micro-architecture design and evaluation. Though accurate, the slow speed often imposes constraints on the e...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck
FTEDA
2006
137views more  FTEDA 2006»
13 years 9 months ago
Statistical Performance Modeling and Optimization
As IC technologies scale to finer feature sizes, it becomes increasingly difficult to control the relative process variations. The increasing fluctuations in manufacturing process...
Xin Li, Jiayong Le, Lawrence T. Pileggi
TCAD
2002
72views more  TCAD 2002»
13 years 8 months ago
Wire width planning for interconnect performance optimization
Abstract--In this paper, we study wire width planning for interconnect performance optimization in an interconnect-centric design flow. We first propose some simplified, yet near-o...
Jason Cong, David Zhigang Pan
CCGRID
2011
IEEE
13 years 14 days ago
DHTbd: A Reliable Block-Based Storage System for High Performance Clusters
—Large, reliable and efficient storage systems are becoming increasingly important in enterprise environments. Our research in storage system design is oriented towards the expl...
George Parissis, George Xylomenos, Theodore K. Apo...