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HIPEAC
2005
Springer
14 years 1 months ago
Exploiting a Computation Reuse Cache to Reduce Energy in Network Processors
Abstract. High end routers are targeted at providing worst case throughput guarantees over latency. Caches on the other hand are meant to help latency not throughput in a tradition...
Bengu Li, Ganesh Venkatesh, Brad Calder, Rajiv Gup...
IOPADS
1996
100views more  IOPADS 1996»
13 years 9 months ago
ENWRICH a Compute-Processor Write Caching Scheme for Parallel File Systems
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
Apratim Purakayastha, Carla Schlatter Ellis, David...
SPDP
1993
IEEE
13 years 12 months ago
The Meerkat Multicomputer
Meerkat is a distributed memory multicomputer architecture that scales to hundreds of processors. Meerkat uses a two dimensional passive backplane to connect nodes composed of pro...
Robert C. Bedichek, Curtis Brown
SAMOS
2005
Springer
14 years 1 months ago
Flux Caches: What Are They and Are They Useful?
In this paper, we introduce the concept of flux caches envisioned to improve processor performance by dynamically changing the cache organization and implementation. Contrary to t...
Georgi Gaydadjiev, Stamatis Vassiliadis
CODES
2011
IEEE
12 years 7 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu