921 search results - page 10 / 185 » On Interleaving in Timed Automata |
LATA
2010
Springer
14 years 4 months ago
2010
Springer
Timed automata has been used as a powerful formalism for specifying, designing, and analyzing real time systems. We consider the generalization of timed automata to Pushdown Timed ...
WIA
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. We describe a general automata-theoretic approach for analyzing the verification problems (binary reachability, safety, etc.) of discrete timed automata augmented with va...
ECBS
2009
IEEE
14 years 2 months ago
2009
IEEE
Probabilistic models are useful for analyzing systems which operate under the presence of uncertainty. In this paper, we present a technique for verifying safety and liveness prop...
FUIN
2008
13 years 7 months ago
2008
The aim of this work is to describe the translation from Intermediate Language, one of the input formalisms of the model checking platform VerICS, to timed automata with discrete d...
FUIN
2007
13 years 7 months ago
2007
Reachability analysis for timed automata using SAT-based methods was considered in many papers, occurring to be a very efficient model checking technique. In this paper we show ho...