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» On Local Register Allocation
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CC
2010
Springer
155views System Software» more  CC 2010»
14 years 3 months ago
Preference-Guided Register Assignment
Abstract. This paper deals with coalescing in SSA-based register allocation. Current coalescing techniques all require the interference graph to be built. This is generally conside...
Matthias Braun, Christoph Mallon, Sebastian Hack
ICCD
2004
IEEE
104views Hardware» more  ICCD 2004»
14 years 5 months ago
Exploiting Quiescent States in Register Lifetime
Large register file with multiple ports, but with a minimal access time, is a critical component in a superscalar processor. Analysis of the lifetime of a logical to physical reg...
Rama Sangireddy, Arun K. Somani
ASPLOS
2000
ACM
14 years 1 months ago
Communication Scheduling
The high arithmetic rates of media processing applications require architectures with tens to hundreds of functional units, multiple register files, and explicit interconnect betw...
Peter R. Mattson, William J. Dally, Scott Rixner, ...
INTEGRATION
2006
102views more  INTEGRATION 2006»
13 years 8 months ago
A parameterized graph-based framework for high-level test synthesis
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
Saeed Safari, Amir-Hossein Jahangir, Hadi Esmaeilz...
HPCA
2012
IEEE
12 years 4 months ago
Flexible register management using reference counting
Conventional out-of-order processors that use a unified physical register file allocate and reclaim registers explicitly using a free list that operates as a circular queue. We ...
Steven Battle, Andrew D. Hilton, Mark Hempstead, A...