Sciweavers

826 search results - page 8 / 166
» On Local Register Allocation
Sort
View
FCCM
2005
IEEE
93views VLSI» more  FCCM 2005»
14 years 2 months ago
Register File Architecture Optimization in a Coarse-Grained Reconfigurable Architecture
This paper investigates the impact of the local and global register file architecture on a reconfigurable system based on the ADRES architecture [3]. The register files consume a s...
Zion Kwok, Steven J. E. Wilton
PLDI
1998
ACM
14 years 25 days ago
Quality and Speed in Linear-scan Register Allocation
A linear-scan algorithm directs the global allocation of register candidates to registers based on a simple linear sweep over the program being compiled. This approach to register...
Omri Traub, Glenn H. Holloway, Michael D. Smith
CC
2009
Springer
190views System Software» more  CC 2009»
14 years 9 months ago
SSA Elimination after Register Allocation
form uses a notational abstractions called -functions. These instructions have no analogous in actual machine instruction sets, and they must be replaced by ordinary instructions ...
Fernando Magno Quintão Pereira, Jens Palsbe...
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
14 years 9 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda
POPL
2003
ACM
14 years 9 months ago
Bitwidth aware global register allocation
Multimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is assigned a r...
Sriraman Tallam, Rajiv Gupta