149 search results - page 22 / 30 » On Mechanism Design without Payments for Throughput Maximiza... |
ISCA
2011
IEEE
13 years 4 days ago
2011
IEEE
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
ICC
2007
IEEE
14 years 2 months ago
2007
IEEE
—An adaptive multiple input and multiple output with the code matrix index feedback [8]. One detector will (MIMO) system based on the unified belief propagation (BP) work in the ...
ISCA
2003
IEEE
14 years 1 months ago
2003
IEEE
To achieve high instruction throughput, instruction schedulers must be capable of producing high-quality schedules that maximize functional unit utilization while at the same time...
MIDDLEWARE
2004
Springer
14 years 1 months ago
2004
Springer
The very nature of implementing and evaluating fully distributed algorithms or protocols in application-layer overlay networks involves certain programming tasks that are at best m...
CCR
2006
13 years 8 months ago
2006
The delay and throughput characteristics of a packet switch depend mainly on the queueing scheme and the scheduling algorithm deployed at the switch. Early research on scheduling ...