Statistical timing analysis has been widely applied to predict the timing yield of VLSI circuits when process variations become significant. Existing statistical latch timing met...
We study the complexity of satisfiability for DLP+ dyn , an expressive logic introduced by Demri that allows to reason about dynamic policies. DLP+ dyn extends the logic DLPdyn of...
A subtyping 0 is entailed by a set of subtyping constraints C, written C j= 0, if every valuation (mapping of type variables to ground types) that satisfies C also satisfies 0. ...
Abstract. The complexity of maximum likelihood decoding of the ReedSolomon codes [q -1, k]q is a well known open problem. The only known result [4] in this direction states that it...
We study (collapsible) higher-order pushdown systems -- theoretically robust and well-studied models of higher-order programs -- along with their natural subclass called (collapsi...