255 search results - page 38 / 51 » On Predictability of Caches for Real-Time Applications |
JSA
2008
13 years 7 months ago
2008
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
CASES
2010
ACM
13 years 5 months ago
2010
ACM
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
LCTRTS
2009
Springer
14 years 2 months ago
2009
Springer
Instruction fetch behavior has been shown to be very regular and predictable, even for diverse application areas. In this work, we propose the Lookahead Instruction Fetch Engine (...
CCS
2007
ACM
14 years 1 months ago
2007
ACM
Abstract. MicroArchitectural Attacks (MA), which can be considered as a special form of SideChannel Analysis, exploit microarchitectural functionalities of processor implementation...