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SOSP
1997
ACM
13 years 8 months ago
Cashmere-2L: Software Coherent Shared Memory on a Clustered Remote-Write Network
Low-latency remote-write networks, such as DEC’s Memory Channel, provide the possibility of transparent, inexpensive, large-scale shared-memory parallel computing on clusters of...
Robert Stets, Sandhya Dwarkadas, Nikos Hardavellas...
JSA
2008
91views more  JSA 2008»
13 years 7 months ago
Using supplier locality in power-aware interconnects and caches in chip multiprocessors
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
Ehsan Atoofian, Amirali Baniasadi
TC
1998
13 years 7 months ago
An Efficient Solution to the Cache Thrashing Problem Caused by True Data Sharing
—When parallel programs are executed on multiprocessors with private caches, a set of data may be repeatedly used and modified by different threads. Such data sharing can often r...
Guohua Jin, Zhiyuan Li, Fujie Chen
COLCOM
2009
IEEE
14 years 6 days ago
DiSK: A distributed shared disk cache for HPC environments
Abstract—Data movement within high performance environments can be a large bottleneck to the overall performance of programs. With the addition of continuous storage and usage of...
Brandon Szeliga, Tung Nguyen, Weisong Shi
CF
2009
ACM
14 years 2 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig