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» On Retiming Synchronous Data-Flow Graphs
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FMCAD
2008
Springer
13 years 9 months ago
Scheduling Optimisations for SPIN to Minimise Buffer Requirements in Synchronous Data Flow
Synchronous Data flow (SDF) graphs have a simple and elegant semantics (essentially linear algebra) which makes SDF graphs eminently suitable as a vehicle for studying scheduling o...
Pieter H. Hartel, Theo C. Ruys, Marc C. W. Geilen
ASPDAC
2011
ACM
227views Hardware» more  ASPDAC 2011»
12 years 11 months ago
Minimizing buffer requirements for throughput constrained parallel execution of synchronous dataflow graph
– This paper concerns throughput-constrained parallel execution of synchronous data flow graphs. This paper assumes static mapping and dynamic scheduling of nodes, which has seve...
Tae-ho Shin, Hyunok Oh, Soonhoi Ha
CODES
1996
IEEE
13 years 11 months ago
Fully Parallel Hardware/Software Codesign for Multi-Dimensional DSP Applications
The design of multi-dimensional systems using hardware/software codesign allows a significant improvement in the development cycle. This paper presents a technique that enables a ...
Michael Sheliga, Nelson L. Passos, Edwin Hsing-Mea...
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
14 years 1 days ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha