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LCPC
2004
Springer
14 years 27 days ago
Power-Aware Scheduling for Parallel Security Processors with Analytical Models
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...
Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq ...
SPAA
2010
ACM
14 years 11 days ago
TLRW: return of the read-write lock
TL2 and similar STM algorithms deliver high scalability based on write-locking and invisible readers. In fact, no modern STM design locks to read along its common execution path b...
David Dice, Nir Shavit
CVPR
2007
IEEE
14 years 9 months ago
OpenVL: Towards A Novel Software Architecture for Computer Vision
This paper presents our progress on OpenVL - a novel software architecture to address efficiency through facilitating hardware acceleration, reusability and scalability for comput...
Changsong Shen, S. Sidney Fels, James J. Little
CASES
2005
ACM
13 years 9 months ago
Optimizing stream programs using linear state space analysis
Digital Signal Processing (DSP) is becoming increasingly widespread in portable devices. Due to harsh constraints on power, latency, and throughput in embedded environments, devel...
Sitij Agrawal, William Thies, Saman P. Amarasinghe
CCGRID
2006
IEEE
13 years 11 months ago
Mirroring Resources or Mapping Requests: Implementing WS-RF for Grid Workflows
The Web Services Resource Framework (WS-RF) and the Web Services Notification (WS-N) specifications are a crucial component of Grid infrastructures. They provide a standardized int...
Thomas Heinis, Cesare Pautasso, Gustavo Alonso