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» On Simulation-Checking with Sequential Systems
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ITC
1999
IEEE
107views Hardware» more  ITC 1999»
14 years 1 months ago
A high-level BIST synthesis method based on a region-wise heuristic for an integer linear programming
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
Han Bin Kim, Dong Sam Ha
ICS
1999
Tsinghua U.
14 years 1 months ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey
PKC
1999
Springer
91views Cryptology» more  PKC 1999»
14 years 1 months ago
A Secure Pay-per View Scheme for Web-Based Video Service
With the development of high speed computer networks, video service on the Web has huge market potential in that the video service can be provided to subscribers with greater time ...
Jianying Zhou, Kwok-Yan Lam
SCALESPACE
1999
Springer
14 years 1 months ago
Morphing Active Contours
ÐA method for deforming curves in a given image to a desired position in a second image is introduced in this paper. The algorithm is based on deforming the first image toward the...
Marcelo Bertalmío, Guillermo Sapiro, Gregor...
ASPLOS
1998
ACM
14 years 1 months ago
Data Speculation Support for a Chip Multiprocessor
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
Lance Hammond, Mark Willey, Kunle Olukotun