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ICDCS
2012
IEEE
11 years 11 months ago
Combining Partial Redundancy and Checkpointing for HPC
Today’s largest High Performance Computing (HPC) systems exceed one Petaflops (1015 floating point operations per second) and exascale systems are projected within seven years...
James Elliott, Kishor Kharbas, David Fiala, Frank ...
IPPS
2007
IEEE
14 years 2 months ago
Formal Analysis for Debugging and Performance Optimization of MPI
High-end computing is universally recognized to be a strategic tool for leadership in science and technology. A significant portion of high-end computing is conducted on clusters...
Ganesh Gopalakrishnan, Robert M. Kirby
FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
14 years 1 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
CCGRID
2009
IEEE
14 years 3 months ago
Natively Supporting True One-Sided Communication in
As high-end computing systems continue to grow in scale, the performance that applications can achieve on such large scale systems depends heavily on their ability to avoid explic...
Gopalakrishnan Santhanaraman, Pavan Balaji, K. Gop...
BMCBI
2011
13 years 3 months ago
Multithreaded comparative RNA secondary structure prediction using stochastic context-free grammars
Background: The prediction of the structure of large RNAs remains a particular challenge in bioinformatics, due to the computational complexity and low levels of accuracy of state...
Zsuzsanna Sukosd, Bjarne Knudsen, Morten Vaerum, J...