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ASPDAC
2008
ACM
101views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Interconnect modeling for improved system-level design optimization
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...
ASPLOS
2008
ACM
13 years 10 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
ASPLOS
2008
ACM
13 years 10 months ago
Adapting to intermittent faults in multicore systems
Future multicore processors will be more susceptible to a variety of hardware failures. In particular, intermittent faults, caused in part by manufacturing, thermal, and voltage v...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
ASPLOS
2008
ACM
13 years 10 months ago
The design and implementation of microdrivers
Device drivers commonly execute in the kernel to achieve high performance and easy access to kernel services. However, this comes at the price of decreased reliability and increas...
Vinod Ganapathy, Matthew J. Renzelmann, Arini Bala...
ASPLOS
2008
ACM
13 years 10 months ago
Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors
Integrating more processor cores on-die has become the unanimous trend in the microprocessor industry. Most of the current research thrusts using chip multiprocessors (CMPs) as th...
Chinnakrishnan S. Ballapuram, Ahmad Sharif, Hsien-...
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