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    » On modeling top-down VLSI design
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    GLVLSI
    2007
    IEEE
    154views VLSI» more  GLVLSI 2007»
    Analyzing and modeling process balance for sub-threshold circuit design
    14 years 2 months ago
    Analyzing and modeling process balance for sub-threshold circuit design
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    Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun
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    VLSID
    2004
    IEEE
    89views VLSI» more  VLSID 2004»
    Response Surface Modeling of 100nm CMOS Process Technology using Design of Experiment
    14 years 9 months ago
    Response Surface Modeling of 100nm CMOS Process Technology using Design of Experiment
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    H. C. Srinivasaiah, Navakanta Bhat
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    ICCAD
    1994
    IEEE
    111views Hardware» more  ICCAD 1994»
    On modeling top-down VLSI design
    14 years 20 days ago
    On modeling top-down VLSI design
    Download  www.cs.york.ac.uk
    We present an improved data model that reflects the whole VLSI design process including bottom-up and topdown design phases. The kernel of the model is a static version concept th...
    Bernd Schürmann, Joachim Altmeyer, Martin Sch...
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    ISCAS
    1999
    IEEE
    101views Hardware» more  ISCAS 1999»
    Modeling of accumulation MOS capacitors for analog design in digital VLSI processes
    14 years 24 days ago
    Modeling of accumulation MOS capacitors for analog design in digital VLSI processes
    Download  www.ee.iitm.ac.in
    S. Pavan, Yannis P. Tsividis, K. Nagaraj
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    DAC
    1994
    ACM
    91views Computer Architecture» more  DAC 1994»
    Cost of Silicon Viewed from VLSI Design Perspective
    14 years 19 days ago
    Cost of Silicon Viewed from VLSI Design Perspective
    Download  www.ece.cmu.edu
    - This paper provides an overview of design/test/CAD silicon cost-related issues. All major factors contributing to the rapid growth of manufacturing costs are explained and a simp...
    Wojciech Maly
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