835 search results - page 104 / 167 » On optimal slicing of parallel programs |
FCCM
2005
IEEE
14 years 3 months ago
2005
IEEE
In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve this goal ...
ISCAS
2005
IEEE
14 years 3 months ago
2005
IEEE
Abstract— In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve...
JUCS
2000
13 years 10 months ago
2000
: Since the era of vector and pipelined computing, the computational speed is limited by the memory access time. Faster caches and more cache levels are used to bridge the growing ...
ICS
2009
Tsinghua U.
14 years 5 months ago
2009
Tsinghua U.
The Cell BE is a multicore processor with eight vector accelerators (called SPEs) that implement explicit cache management through direct memory access engines. While the Cell has...
IPPS
2006
IEEE
14 years 4 months ago
2006
IEEE
In recent years, several approaches have been proposed to use profile information in compiler optimization. This profile information can be used at the source level to guide loo...