Sciweavers

1394 search results - page 224 / 279
» On performance limitations of congestion control
Sort
View
ISCA
2003
IEEE
157views Hardware» more  ISCA 2003»
14 years 2 months ago
Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage
Scaling of CMOS technology causes the power supply voltages to fall and supply currents to rise at the same time as operating speeds are increasing. Falling supply voltages cause ...
Michael D. Powell, T. N. Vijaykumar
BMCBI
2010
87views more  BMCBI 2010»
13 years 8 months ago
poolMC: Smart pooling of mRNA samples in microarray experiments
Background: Typically, pooling of mRNA samples in microarray experiments implies mixing mRNA from several biological-replicate samples before hybridization onto a microarray chip....
Raghunandan M. Kainkaryam, Angela Bruex, Anna C. G...
PPOPP
2010
ACM
14 years 6 months ago
Lazy binary-splitting: a run-time adaptive work-stealing scheduler
We present Lazy Binary Splitting (LBS), a user-level scheduler of nested parallelism for shared-memory multiprocessors that builds on existing Eager Binary Splitting work-stealing...
Alexandros Tzannes, George C. Caragea, Rajeev Baru...
ICCCN
2007
IEEE
14 years 3 months ago
On Improving the Reliability of Packet Delivery in Dense Wireless Sensor Networks
—Wireless sensor networks (WSN) built using current Berkeley Mica motes exhibit low reliability for packet delivery. There is anecdotal evidence of poor packet delivery rates fro...
JunSuk Shin, Umakishore Ramachandran, Mostafa H. A...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 2 months ago
ASR: Adaptive Selective Replication for CMP Caches
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
Bradford M. Beckmann, Michael R. Marty, David A. W...