315 search results - page 50 / 63 » On reducing load store latencies of cache accesses |
SKG
2006
IEEE
14 years 1 months ago
2006
IEEE
Predominant resources for execution of any application are computational power and memory. On one side, computational power has grown many folds faster than memory capacity. On th...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
Store misses cause significant delays in shared-memory multiprocessors because of limited store buffering and ordering constraints required for proper synchronization. Today, prog...
SNPD
2003
13 years 9 months ago
2003
This paper focuses on non-strict processing, optimization, and partial evaluation of MPI programs which use incremental data structures (ISs). We describe the design and implement...
CORR
2010
Springer
13 years 5 months ago
2010
Springer
In this paper we have proposed a dynamic buffer allocation algorithm for the prefix, based on the popularity of the videos. More cache blocks are allocated for most popular videos...
EUROMICRO
1999
IEEE
13 years 12 months ago
1999
IEEE
This research proposes a selective compressed memory system (SCMS) focusing on a compressed cache architecture, in which only data blocks with good compression efficiency are comp...