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ISCA
2002
IEEE
103views Hardware» more  ISCA 2002»
14 years 14 days ago
Efficient Dynamic Scheduling Through Tag Elimination
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...
Dan Ernst, Todd M. Austin
GPC
2007
Springer
14 years 1 months ago
A Novel Data Grid Coherence Protocol Using Pipeline-Based Aggressive Copy Method
Grid systems are well-known for its high performance computing or large data storage with inexpensive devices. They can be categorized into two major types: computational grid and ...
Reen-Cheng Wang, Su-Ling Wu, Ruay-Shiung Chang
ANCS
2009
ACM
13 years 5 months ago
Divide and discriminate: algorithm for deterministic and fast hash lookups
Exact and approximate membership lookups are among the most widely used primitives in a number of network applications. Hash tables are commonly used to implement these primitive ...
Domenico Ficara, Stefano Giordano, Sailesh Kumar, ...
INFOCOM
1998
IEEE
13 years 11 months ago
Active Reliable Multicast
Abstract--This paper presents a novel loss recovery scheme, Active Reliable Multicast (ARM), for large-scale reliable multicast. ARM is "active" in that routers in the mu...
Li-Wei H. Lehman, Stephen J. Garland, David L. Ten...
TON
2008
124views more  TON 2008»
13 years 7 months ago
Designing packet buffers for router linecards
-- Internet routers and Ethernet switches contain packet buffers to hold packets during times of congestion. Packet buffers are at the heart of every packet switch and router, whic...
Sundar Iyer, Ramana Rao Kompella, Nick McKeown