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LCPC
2005
Springer
14 years 1 months ago
Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms
Techniques for global register allocation via graph coloring have been extensively studied and widely implemented in compiler frameworks. This paper examines a particular variant â...
Keith D. Cooper, Anshuman Dasgupta, Jason Eckhardt
FPGA
2004
ACM
147views FPGA» more  FPGA 2004»
14 years 28 days ago
The SFRA: a corner-turn FPGA architecture
FPGAs normally operate at whatever clock rate is appropriate for the loaded conï¬guration. When FPGAs are used as computational devices in a larger system, however, it is better ...
Nicholas Weaver, John R. Hauser, John Wawrzynek
P2P
2003
IEEE
14 years 25 days ago
A Transpositional Redundant Data Update Algorithm for Growing Server-Less Video Streaming Systems
Recently, a new server-less architecture is proposed for building low-cost yet scalable video streaming systems. In this architecture, video blocks are distributed among user host...
Tsz Kin Ho, Jack Y. B. Lee
ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
14 years 24 days ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
IWCMC
2010
ACM
14 years 19 days ago
Reconstruction of malicious internet flows
We describe a general-purpose distributed system capable of traceback of malicious flow trajectories in the wide area despite possible source IP spooï¬ng. Our system requires th...
Omer Demir, Bilal Khan, Ala I. Al-Fuqaha