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» On the Architecture of System Verification Environments
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ENTCS
2002
145views more  ENTCS 2002»
13 years 7 months ago
Combining Monitors for Runtime System Verification
Runtime verification permits checking system properties that cannot be fully verified off-line. This is particularly true when the system includes complex third-party components, ...
Joshua Levy, Hassen Saïdi, Tomás E. Ur...
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
13 years 11 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
ATVA
2006
Springer
191views Hardware» more  ATVA 2006»
13 years 11 months ago
Automatic Verification of Hybrid Systems with Large Discrete State Space
We address the problem of model checking hybrid systems which exhibit nontrivial discrete behavior and thus cannot be treated by considering the discrete states one by one, as most...
Werner Damm, Stefan Disch, Hardi Hungar, Jun Pang,...
DAC
1997
ACM
13 years 11 months ago
Formal Verification of a Superscalar Execution Unit
Abstract. Many modern systems are designed as a set of interconnected reactive subsystems. The subsystem verification task is to verify an implementation of the subsystem against t...
Kyle L. Nelson, Alok Jain, Randal E. Bryant
HASE
2008
IEEE
13 years 7 months ago
Aiding Modular Design and Verification of Safety-Critical Time-Triggered Systems by Use of Executable Formal Specifications
Designing safety-critical systems is a complex process, and especially when the design is carried out at different f abstraction where the correctness of the design at one level i...
Kohei Sakurai, Péter Bokor, Neeraj Suri