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» On the Complexity of Register Coalescing
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IPPS
2007
IEEE
14 years 1 months ago
Microarchitectural Support for Speculative Register Renaming
This paper proposes and evaluates a new microarchitecture for out-of-order processors that supports speculative renaming. We call speculative renaming to the speculative omission ...
Jesús Alastruey, Teresa Monreal, Víc...
IEEEPACT
2003
IEEE
14 years 23 days ago
Reducing Datapath Energy through the Isolation of Short-Lived Operands
We present a technique for reducing the power dissipation in the course of writebacks and committments in a datapath that uses a dedicated architectural register file (ARF) to hol...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...
IEEECIT
2010
IEEE
13 years 6 months ago
Parallel Best Neighborhood Matching Algorithm Implementation on GPU Platform
—Error concealment restores the visual integrity of image content that has been damaged due to a bad network transmission. Best neighborhood matching (BNM) is an effective image ...
Guangyong Zhang, Liqiang He, Yanyan Zhang
PLDI
2005
ACM
14 years 1 months ago
Register allocation for software pipelined multi-dimensional loops
Software pipelining of a multi-dimensional loop is an important optimization that overlaps the execution of successive outermost loop iterations to explore instruction-level paral...
Hongbo Rong, Alban Douillet, Guang R. Gao
FOSSACS
2008
Springer
13 years 9 months ago
Model Checking Freeze LTL over One-Counter Automata
We study complexity issues related to the model-checking problem for LTL with registers (a.k.a. freeze LTL) over one-counter automata. We consider several classes of one-counter au...
Stéphane Demri, Ranko Lazic, Arnaud Sangnie...