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» On the Complexity of Register Coalescing
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ACSD
2005
IEEE
144views Hardware» more  ACSD 2005»
14 years 1 months ago
An Automated Fine-Grain Pipelining Using Domino Style Asynchronous Library
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
Alexander B. Smirnov, Alexander Taubin, Ming Su, M...
CCGRID
2005
IEEE
14 years 1 months ago
A distributed resource and network partitioning architecture for service grids
Abstract In this paper, we propose the use of a distributed service management architecture for state-of-the-art service-enabled Grids. The architecture is capable of performing au...
Bruno Volckaert, Pieter Thysebaert, Marc De Leenhe...
EGH
2005
Springer
14 years 1 months ago
Optimal automatic multi-pass shader partitioning by dynamic programming
Complex shaders must be partitioned into multiple passes to execute on GPUs with limited hardware resources. Automatic partitioning gives rise to an NP-hard scheduling problem tha...
Alan Heirich
AIPR
2003
IEEE
14 years 25 days ago
Registration of Range Data from Unmanned Aerial and Ground Vehicles
In the research reported in this paper, we propose to overcome the unavailability of Global Positioning System (GPS) using combined information obtained from a scanning LADAR rang...
Anthony Downs, Raj Madhavan, Tsai Hong
IPPS
2003
IEEE
14 years 25 days ago
ECO: An Empirical-Based Compilation and Optimization System
In this paper, we describe a compilation system that automates much of the process of performance tuning that is currently done manually by application programmers interested in h...
Nastaran Baradaran, Jacqueline Chame, Chun Chen, P...