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131
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ICPP
1999
IEEE
15 years 7 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
153
Voted
IPPS
2010
IEEE
15 years 21 days ago
Efficient hardware support for the Partitioned Global Address Space
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
Holger Fröning, Heiner Litz
231
Voted
ASPLOS
2009
ACM
16 years 4 months ago
Maximum benefit from a minimal HTM
A minimal, bounded hardware transactional memory implementation significantly improves synchronization performance when used in an operating system kernel. We add HTM to Linux 2.4...
Owen S. Hofmann, Christopher J. Rossbach, Emmett W...
119
Voted
GROUP
2007
ACM
15 years 7 months ago
That's what friends are for: facilitating 'who knows what' across group boundaries
We describe the design and evaluation of K-net, a social matching system to help people learn 'who knows what' in an organization by matching people with skills with tho...
N. Sadat Shami, Y. Connie Yuan, Dan Cosley, Ling X...
NIXDORF
1992
116views Hardware» more  NIXDORF 1992»
15 years 7 months ago
Programmable Active Memories: A Performance Assessment
We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [2]. Based on Field Programmable Gate Array (...
Patrice Bertin, Didier Roncin, Jean Vuillemin