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EUROPAR
2001
Springer
14 years 9 days ago
Performance of High-Accuracy PDE Solvers on a Self-Optimizing NUMA Architecture
High-accuracy PDE solvers use multi-dimensional fast Fourier transforms. The FFTs exhibits a static and structured memory access pattern which results in a large amount of communic...
Sverker Holmgren, Dan Wallin
VLSI
2007
Springer
14 years 1 months ago
Simulation of hybrid computer architectures: simulators, methodologies and recommendations
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
Pranav Vaidya, Jaehwan John Lee
ICS
2001
Tsinghua U.
14 years 7 days ago
Computer aided hand tuning (CAHT): "applying case-based reasoning to performance tuning"
For most parallel and high performance systems, tuning guides provide the users with advices to optimize the execution time of their programs. Execution time may be very sensitive...
Antoine Monsifrot, François Bodin
SLIP
2003
ACM
14 years 1 months ago
A hierarchical three-way interconnect architecture for hexagonal processors
The problem of interconnect architecture arises when an array of processors needs to be integrated on one chip. With the deep sub-micron technology, devices become cheap while wir...
Feng Zhou, Esther Y. Cheng, Bo Yao, Chung-Kuan Che...
FOCS
1994
IEEE
13 years 12 months ago
On-line Admission Control and Circuit Routing for High Performance Computing and Communication
This paper considers the problems of admission control and virtual circuit routing in high performance computing and communication systems. Admission control and virtual circuit r...
Baruch Awerbuch, Rainer Gawlick, Frank Thomson Lei...