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» On the Power of Networks of Evolutionary Processors
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IPPS
1999
IEEE
14 years 1 days ago
Portable Parallel Programming for the Dynamic Load Balancing of Unstructured Grid Applications
The ability to dynamically adapt an unstructured grid (or mesh) is a powerful tool for solving computational problems with evolving physical features; however, an efficient parall...
Rupak Biswas, Leonid Oliker, Sajal K. Das, Daniel ...
IPPS
1999
IEEE
14 years 1 days ago
Marshaling/Demarshaling as a Compilation/Interpretation Process
Marshaling is the process through which structured values are serialized into a stream of bytes; demarshaling converts this stream of bytes back to structured values. Most often, ...
Christian Queinnec
FPGA
2008
ACM
151views FPGA» more  FPGA 2008»
13 years 9 months ago
Beyond the arithmetic constraint: depth-optimal mapping of logic chains in LUT-based FPGAs
Look-up table based FPGAs have migrated from a niche technology for design prototyping to a valuable end-product component and, in some cases, a replacement for general purpose pr...
Michael T. Frederick, Arun K. Somani
VLSI
2010
Springer
13 years 6 months ago
Synchronous elasticization: Considerations for correct implementation and MiniMIPS case study
—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...
Eliyah Kilada, Shomit Das, Kenneth S. Stevens
MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
13 years 5 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...