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APPT
2009
Springer
14 years 2 months ago
A Fast Scheme to Investigate Thermal-Aware Scheduling Policy for Multicore Processors
Abstract. With more cores integrated into one single chip, the overall power consumption from the multiple concurrent running programs increases dramatically in a CMP processor whi...
Liqiang He, Cha Narisu
ICPP
2008
IEEE
14 years 1 months ago
Memory Access Scheduling Schemes for Systems with Multi-Core Processors
On systems with multi-core processors, the memory access scheduling scheme plays an important role not only in utilizing the limited memory bandwidth but also in balancing the pro...
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zh...
HPCA
2011
IEEE
12 years 11 months ago
Shared last-level TLBs for chip multiprocessors
Translation Lookaside Buffers (TLBs) are critical to processor performance. Much past research has addressed uniprocessor TLBs, lowering access times and miss rates. However, as c...
Abhishek Bhattacharjee, Daniel Lustig, Margaret Ma...
PLDI
2012
ACM
11 years 10 months ago
Parcae: a system for flexible parallel execution
Workload, platform, and available resources constitute a parallel program’s execution environment. Most parallelization efforts statically target an anticipated range of environ...
Arun Raman, Ayal Zaks, Jae W. Lee, David I. August
ICPP
2007
IEEE
14 years 1 months ago
SOR: A Static File Assignment Strategy Immune to Workload Characteristic Assumptions in Parallel I/O Systems
The problem of statically assigning nonpartitioned files in a parallel I/O system has been extensively investigated. A basic workload characteristic assumption of existing solutio...
Tao Xie 0004