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MICRO
2010
IEEE
119views Hardware» more  MICRO 2010»
13 years 3 months ago
Task Superscalar: An Out-of-Order Task Pipeline
We present Task Superscalar, an abstraction of instruction-level out-of-order pipeline that operates at the tasklevel. Like ILP pipelines, which uncover parallelism in a sequential...
Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex...
SCW
2012
IEEE
12 years 4 months ago
Linear cost share equilibria and the veto power of the grand coalition
We consider pure exchange economies with finitely many private goods involving the choice of a public project. We discuss core-equivalence results in the general framework of non...
Maria Gabriella Graziano, Maria Romaniello
ISCA
2012
IEEE
191views Hardware» more  ISCA 2012»
11 years 11 months ago
VRSync: Characterizing and eliminating synchronization-induced voltage emergencies in many-core processors
Power consumption is a primary concern for microprocessor designers. Lowering the supply voltage of processors is one of the most effective techniques for improving their energy e...
Timothy N. Miller, Renji Thomas, Xiang Pan, Radu T...
ETS
2011
IEEE
212views Hardware» more  ETS 2011»
12 years 8 months ago
Structural Test for Graceful Degradation of NoC Switches
Abstract—Networks-on-Chip (NoCs) are implicitly fault tolerant due to their inherent redundancy. They can overcome defective cores, links and switches. As a side effect, yield is...
Atefe Dalirsani, Stefan Holst, Melanie Elm, Hans-J...
OWLED
2008
13 years 10 months ago
OWLlink: DIG for OWL 2
The OWLlink interface provides an implementation-neutral mechanism for accessing OWL reasoner functionality. In contrast to its DL-oriented predecessor DIG, OWLlink relies on OWL 2...
Thorsten Liebig, Marko Luther, Olaf Noppens, Maria...