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VTC
2007
IEEE
108views Communications» more  VTC 2007»
14 years 3 months ago
Multiuser MIMO: Principle, Performance in Measured Channels and Applicable Service
—The exploitation of multiuser diversity and the application of multiple antennas at transmitter and receiver are considered to be key technologies for future highly bandwidtheff...
Gerhard Bauch, Pedro Tejera, Christian Guthy, Wolf...
ICS
2007
Tsinghua U.
14 years 2 months ago
Cooperative cache partitioning for chip multiprocessors
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...
Jichuan Chang, Gurindar S. Sohi
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 2 months ago
ASR: Adaptive Selective Replication for CMP Caches
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
Bradford M. Beckmann, Michael R. Marty, David A. W...
SIGMETRICS
2005
ACM
150views Hardware» more  SIGMETRICS 2005»
14 years 2 months ago
An analytical model for multi-tier internet services and its applications
- Since many Web applications employ a multi-tier architecture, in this paper, we focus on the problem of analytically modeling the behavior of such applications. We present a mode...
Bhuvan Urgaonkar, Giovanni Pacifici, Prashant J. S...
WMPI
2004
ACM
14 years 2 months ago
A compressed memory hierarchy using an indirect index cache
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
Erik G. Hallnor, Steven K. Reinhardt