Many Built-In Self Test pattern generators use Linear Feedback Shift Registers (LFSR) to generate test sequences. In this paper, we address the generation of deterministic pairs o...
This paper presents a low-overhead scheme for built-in self-test of circuits with scan. Complete (100%) fault coverage is obtained without modifying the function logic and without...
This paper presents a procedure for Synthesis of LINear test pattern Generators called SLING. SLING can synthesize linear test pattern generators that satisfy constraints on area,...
This paper describes a class of FPGA-specific uniform random number generators with a 2k −1 length period, which can provide k random bits per-cycle for the cost of k Lookup Ta...