184 search results - page 17 / 37 » On the power of hardware transactional memory to simplify me... |
FPGA
2011
ACM
13 years 7 days ago
2011
ACM
FPGAs have been used in many applications to achieve orders-of-magnitude improvement in absolute performance and energy efficiency relative to conventional microprocessors. Despit...
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
IEEEPACT
2006
IEEE
14 years 2 months ago
2006
IEEE
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
DSD
2004
IEEE
14 years 14 days ago
2004
IEEE
Tile-based rendering (also called chunk rendering or bucket rendering) is a promising technique for low-power, 3D graphics platforms. This technique decomposes a scene into smalle...
ISCA
2012
IEEE
11 years 11 months ago
2012
IEEE
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...