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IEEEPACT
2005
IEEE
14 years 2 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...
ICCAD
2008
IEEE
153views Hardware» more  ICCAD 2008»
14 years 5 months ago
SPM management using Markov chain based data access prediction
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...
HPCA
2006
IEEE
14 years 9 months ago
The common case transactional behavior of multithreaded programs
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen...
ACMMSP
2006
ACM
232views Hardware» more  ACMMSP 2006»
14 years 2 months ago
Implicit and explicit optimizations for stencil computations
Stencil-based kernels constitute the core of many scientific applications on block-structured grids. Unfortunately, these codes achieve a low fraction of peak performance, due pr...
Shoaib Kamil, Kaushik Datta, Samuel Williams, Leon...
HPCA
1997
IEEE
14 years 29 days ago
Software-Managed Address Translation
In this paper we explore software-managed address translation. The purpose of the study is to specify the memory management design for a high clock-rate PowerPC implementation in ...
Bruce L. Jacob, Trevor N. Mudge