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» On the power of hardware transactional memory to simplify me...
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VEE
2005
ACM
218views Virtualization» more  VEE 2005»
14 years 2 months ago
The pauseless GC algorithm
Modern transactional response-time sensitive applications have run into practical limits on the size of garbage collected heaps. The heap can only grow until GC pauses exceed the ...
Cliff Click, Gil Tene, Michael Wolf
CODES
2009
IEEE
14 years 3 months ago
FRA: a flash-aware redundancy array of flash storage devices
Since flash memory has many attractive characteristics such as high performance, non-volatility, low power consumption and shock resistance, it has been widely used as storage med...
Yangsup Lee, Sanghyuk Jung, Yong Ho Song
SIGMOD
2011
ACM
193views Database» more  SIGMOD 2011»
12 years 11 months ago
Fast checkpoint recovery algorithms for frequently consistent applications
Advances in hardware have enabled many long-running applications to execute entirely in main memory. As a result, these applications have increasingly turned to database technique...
Tuan Cao, Marcos Antonio Vaz Salles, Benjamin Sowe...
FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
14 years 29 days ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings
HPCA
2011
IEEE
13 years 13 days ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan