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GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
15 years 12 months ago
Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor
LNS (logarithmic number system) arithmetic has the advantages of high-precision and high performance in complex function computation. However, the large hardware problem in LNS ad...
Chichyang Chen, Paul Chow
ICC
2007
IEEE
106views Communications» more  ICC 2007»
15 years 12 months ago
A Hierarchical Weighted Round Robin EPON DBA Scheme and Its Comparison with Cyclic Water-Filling Algorithm
—A H-WRR (Hierarchical Weighted Round-Robin) EPON (Ethernet Passive Optical Network) DBA (Dynamic Bandwidth Allocation) algorithm is devised and investigated. WRR table entries h...
Chan Kim, Tae-Whan Yoo, Bong-Tae Kim
ICCV
2007
IEEE
15 years 12 months ago
Total Recall: Automatic Query Expansion with a Generative Feature Model for Object Retrieval
Given a query image of an object, our objective is to retrieve all instances of that object in a large (1M+) image database. We adopt the bag-of-visual-words architecture which ha...
Ondrej Chum, James Philbin, Josef Sivic, Michael I...
143
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ICNS
2007
IEEE
15 years 12 months ago
IGMPS, a New Tool for Estimating End-to-End Available Bandwidth in IP Network Paths
— This paper presents a new end-to-end available bandwidth measurement tool called IGMPS (Improved Gap Model using Packet Size parameter). IGMPS is a lightweight tool based on a ...
Ahmed Ait Ali, Francis Lepage
INFOCOM
2007
IEEE
15 years 12 months ago
Iterative Scheduling Algorithms
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
Mohsen Bayati, Balaji Prabhakar, Devavrat Shah, Ma...