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» On-Chip Test Generation Using Linear Subspaces
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CGO
2010
IEEE
14 years 2 months ago
Linear scan register allocation on SSA form
The linear scan algorithm for register allocation provides a good register assignment with a low compilation overhead and is thus frequently used for just-in-time compilers. Altho...
Christian Wimmer, Michael Franz
ICSE
2008
IEEE-ACM
14 years 8 months ago
Sufficient mutation operators for measuring test effectiveness
Mutants are automatically-generated, possibly faulty variants of programs. The mutation adequacy ratio of a test suite is the ratio of non-equivalent mutants it is able to identif...
Akbar Siami Namin, James H. Andrews, Duncan J. Mur...
ACSAC
2006
IEEE
14 years 1 months ago
Practical Attack Graph Generation for Network Defense
Attack graphs are a valuable tool to network defenders, illustrating paths an attacker can use to gain access to a targeted network. Defenders can then focus their efforts on patc...
Kyle Ingols, Richard Lippmann, Keith Piwowarski
IPMI
2007
Springer
14 years 8 months ago
Localized Components Analysis
We introduce Localized Components Analysis (LoCA) for describing surface shape variation in an ensemble of biomedical objects using a linear subspace of spatially localized shape c...
Dan A. Alcantara, Owen T. Carmichael, Eric Delson,...
PAMI
2012
11 years 10 months ago
Probabilistic Models for Inference about Identity
—Many face recognition algorithms use “distance-based” methods: Feature vectors are extracted from each face and distances in feature space are compared to determine matches....
Simon Prince, Peng Li, Yun Fu, Umar Mohammed, Jame...