48 search results - page 6 / 10 » On-Chip Test Infrastructure Design for Optimal Multi-Site Te... |
RECOMB
2002
Springer
14 years 9 months ago
2002
Springer
There are many critical situations when one needs to rapidly identify an unidentified pathogen from among a given set of previously sequenced pathogens. DNA or RNA hybridization c...
MTDT
2003
IEEE
14 years 1 months ago
2003
IEEE
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
WISES
2003
13 years 10 months ago
2003
— With the increasing number of embedded computer systems being used in safety critical applications the testing and assessment of a system’s fault tolerance properties become ...
CASES
2001
ACM
14 years 7 days ago
2001
ACM
Increased systems level integration has meant the movement of many traditionally off chip components onto a single chip including a processor, instruction storage, data path, and ...
JSA
2002
13 years 8 months ago
2002
This paper presents a dependability oriented, fault tolerance based system design, development, and deployment approach. The approach relies on an architectural framework, which a...