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DSN
2011
IEEE
12 years 7 months ago
Transparent dynamic binding with fault-tolerant cache coherence protocol for chip multiprocessors
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...
Shuchang Shan, Yu Hu, Xiaowei Li
IJHPCA
2010
117views more  IJHPCA 2010»
13 years 5 months ago
Fine-Grained Multithreading Support for Hybrid Threaded MPI Programming
As high-end computing systems continue to grow in scale, recent advances in multiand many-core architectures have pushed such growth toward more denser architectures, that is, mor...
Pavan Balaji, Darius Buntinas, David Goodell, Will...
FOCS
2004
IEEE
13 years 11 months ago
On the Streaming Model Augmented with a Sorting Primitive
The need to deal with massive data sets in many practical applications has led to a growing interest in computational models appropriate for large inputs. The most important quali...
Gagan Aggarwal, Mayur Datar, Sridhar Rajagopalan, ...
ICAI
2008
13 years 8 months ago
Online Boosting Based Intrusion Detection in Changing Environments
Intrusion detection is an active research field in the development of reliable web-based information systems, where many artificial intelligence techniques are exploited to fit th...
Yanguo Wang, Weiming Hu, Xiaoqin Zhang
MOBIHOC
2000
ACM
13 years 11 months ago
Low power rendezvous in embedded wireless networks
ln the future, wireless networking will be embedded into a wide variety of common, everyday objects [1]. In many embedded networking situations, the communicating nodes will be ver...
Terry Todd, Frazer Bennett, Alan Jones