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IPPS
2007
IEEE
14 years 2 months ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi
IPPS
2005
IEEE
14 years 1 months ago
Improvement of Power-Performance Efficiency for High-End Computing
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. R...
Rong Ge, Xizhou Feng, Kirk W. Cameron
EMSOFT
2003
Springer
14 years 1 months ago
Event Correlation: Language and Semantics
Abstract. Event correlation is a service provided by middleware platforms that allows components in a publish/subscribe architecture to subscribe to patterns of events rather than ...
César Sánchez, Sriram Sankaranarayan...
ICVS
2001
Springer
14 years 12 days ago
A Framework for Generic State Estimation in Computer Vision Applications
Abstract. Experimenting and building integrated, operational systems in computational vision poses both theoretical and practical challenges, involving methodologies from control t...
Cristian Sminchisescu, Alexandru Telea
ETS
2007
IEEE
128views Hardware» more  ETS 2007»
13 years 9 months ago
Selecting Power-Optimal SBST Routines for On-Line Processor Testing
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
Andreas Merentitis, Nektarios Kranitis, Antonis M....