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» Optimal Control With Noisy Time
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GECCO
2006
Springer
151views Optimization» more  GECCO 2006»
15 years 8 months ago
Sporadic model building for efficiency enhancement of hierarchical BOA
This paper describes and analyzes sporadic model building, which can be used to enhance the efficiency of the hierarchical Bayesian optimization algorithm (hBOA) and other advance...
Martin Pelikan, Kumara Sastry, David E. Goldberg
RTSS
2005
IEEE
15 years 10 months ago
WCET Centric Data Allocation to Scratchpad Memory
Scratchpad memory is a popular choice for on-chip storage in real-time embedded systems. The allocation of code/data to scratchpad memory is performed at compile time leading to p...
Vivy Suhendra, Tulika Mitra, Abhik Roychoudhury, T...
ITC
1999
IEEE
107views Hardware» more  ITC 1999»
15 years 8 months ago
A high-level BIST synthesis method based on a region-wise heuristic for an integer linear programming
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
Han Bin Kim, Dong Sam Ha
ICCAD
1995
IEEE
94views Hardware» more  ICCAD 1995»
15 years 8 months ago
Test register insertion with minimum hardware cost
Implementing a built-in self-test by a "test per clock" scheme offers advantages concerning fault coverage, detection of delay faults, and test application time. Such a ...
Albrecht P. Stroele, Hans-Joachim Wunderlich
ATS
2009
IEEE
92views Hardware» more  ATS 2009»
15 years 2 months ago
M-IVC: Using Multiple Input Vectors to Minimize Aging-Induced Delay
Negative bias temperature instability (NBTI) has been a significant reliability concern in current digital circuit design due to its effect of increasing the path delay with time a...
Song Jin, Yinhe Han, Lei Zhang 0008, Huawei Li, Xi...