186 search results - page 25 / 38 » Optimal Hardware Software Partitioning for Concurrent Specif... |
ASPLOS
2009
ACM
14 years 9 months ago
2009
ACM
Miss rate curves (MRCs) are useful in a number of contexts. In our research, online L2 cache MRCs enable us to dynamically identify optimal cache sizes when cache-partitioning a s...
CGO
2004
IEEE
14 years 5 days ago
2004
IEEE
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
CASES
2010
ACM
13 years 6 months ago
2010
ACM
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
RTSS
2007
IEEE
14 years 2 months ago
2007
IEEE
Creating robust real-time embedded software is critical in combining the physical world with computing, such as in consumer electronics or robotics. One challenge is the complexit...
ISPASS
2010
IEEE
14 years 3 months ago
2010
IEEE
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...