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IEEEPACT
2002
IEEE
14 years 14 days ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
PAAPP
2006
141views more  PAAPP 2006»
13 years 7 months ago
Algorithmic optimizations of a conjugate gradient solver on shared memory architectures
OpenMP is an architecture-independent language for programming in the shared memory model. OpenMP is designed to be simple and in terms of programming abstractions. Unfortunately,...
Henrik Löf, Jarmo Rantakokko
GLOBECOM
2007
IEEE
14 years 1 months ago
Distributed Control Plane for 4D Architecture
—We explore the design of a logically centralized but physically distributed control plane for 4D architecture. 4D architecture proposes centralization of network-wide decision m...
Hammad Iqbal, Taieb Znati
PDP
2010
IEEE
14 years 2 months ago
Lessons Learnt Porting Parallelisation Techniques for Irregular Codes to NUMA Systems
—This work presents a study undertaken to characterise the behaviour of some parallelisation techniques for irregular codes, previously developed for SMP architectures, on a seve...
Juan Angel Lorenzo, Juan Carlos Pichel, David LaFr...
MOBIDE
2003
ACM
14 years 24 days ago
TiNA: a scheme for temporal coherency-aware in-network aggregation
This paper presents TiNA, a scheme for minimizing energy consumption in sensor networks by exploiting end-user tolerance to temporal coherency. TiNA utilizes temporal coherency to...
Mohamed A. Sharaf, Jonathan Beaver, Alexandros Lab...