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ISCAPDCS
2004
13 years 9 months ago
One-Level Cache Memory Design for Scalable SMT Architectures
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
Muhamed F. Mudawar, John R. Wani
IADIS
2009
13 years 5 months ago
A strategy for cost efficient distributed data storage for in-memory OLAP
With the availability of inexpensive blade servers featuring 32 GB or more of main memory, memory-based engines such as the SAP NetWeaver Business Warehouse Accelerator are coming...
Olga Mordvinova, Oleksandr Shepil, Thomas Ludwig 0...
OTM
2005
Springer
14 years 1 months ago
Peer-to-Peer Distribution Architectures Providing Uniform Download Rates
Peer-to-peer (P2P) networks have proved to be a powerful and highly scalable alternative to traditional client-server architectures for content distribution. They offer the techni...
Marc Schiely, Pascal Felber
ECIR
2004
Springer
13 years 9 months ago
Performance Analysis of Distributed Architectures to Index One Terabyte of Text
We simulate different architectures of a distributed Information Retrieval system on a very large Web collection, in order to work out the optimal setting for a particular set of r...
Fidel Cacheda, Vassilis Plachouras, Iadh Ounis
AIPR
2008
IEEE
13 years 9 months ago
Low-cost, high-speed computer vision using NVIDIA's CUDA architecture
In this paper, we introduce real time image processing techniques using modern programmable Graphic Processing Units (GPU). GPUs are SIMD (Single Instruction, Multiple Data) device...
Seung In Park, Sean P. Ponce, Jing Huang, Yong Cao...