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ASPDAC
2008
ACM
127views Hardware» more  ASPDAC 2008»
13 years 9 months ago
A multicycle communication architecture and synthesis flow for Global interconnect Resource Sharing
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
Wei-Sheng Huang, Yu-Ru Hong, Juinn-Dar Huang, Ya-S...
NPC
2010
Springer
13 years 6 months ago
Exposing Tunable Parameters in Multi-threaded Numerical Code
Achieving high performance on today’s architectures requires careful orchestration of many optimization parameters. In particular, the presence of shared-caches on multicore arch...
Apan Qasem, Jichi Guo, Faizur Rahman, Qing Yi
ICDE
2001
IEEE
141views Database» more  ICDE 2001»
14 years 9 months ago
Processing Queries with Expensive Functions and Large Objects in Distributed Mediator Systems
LeSelect is a mediator system which allows scientists to publish their resources (data and programs) so they can be transparently accessed. The scientists can typically issue quer...
Fabio Porto, Françoise Fabret, Luc Bouganim...
ICPP
1998
IEEE
13 years 12 months ago
Performance Implications of Architectural and Software Techniques on I/O-Intensive Applications
Many large scale applications, have significant I/O requirements as well as computational and memory requirements. Unfortunately, limited number of I/O nodes provided by the conte...
Meenakshi A. Kandaswamy, Mahmut T. Kandemir, Alok ...
IPPS
2007
IEEE
14 years 1 months ago
Analysis of a Computational Biology Simulation Technique on Emerging Processing Architectures
1 Multi-paradigm, multi-threaded and multi-core computing devices available today provide several orders of magnitude performance improvement over mainstream microprocessors. These...
Jeremy S. Meredith, Sadaf R. Alam, Jeffrey S. Vett...