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» Optimal Scheduling of Dynamic Progressive Processing
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IJFCS
2006
82views more  IJFCS 2006»
13 years 8 months ago
Routing Multiple Width Communications on the Circuit Switched Tree
Dynamically reconfigurable architectures offer extremely fast solutions to various problems. The Circuit Switched Tree (CST) is an important interconnect used to implement such ar...
Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L...
RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
14 years 25 days ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
ANCS
2005
ACM
14 years 2 months ago
Framework for supporting multi-service edge packet processing on network processors
Network edge packet-processing systems, as are commonly implemented on network processor platforms, are increasingly required to support a rich set of services. These multi-servic...
Arun Raghunath, Aaron R. Kunze, Erik J. Johnson, V...
ICMCS
2006
IEEE
110views Multimedia» more  ICMCS 2006»
14 years 2 months ago
Media Streaming with Conservative Delay on Variable Rate Channels
We address the problem of delay-constrained streaming of multimedia packets over dynamic bandwidth channels. Efficient streaming solutions generally rely on the knowledge of the ...
Dan Jurca, Pascal Frossard
INFOCOM
2009
IEEE
14 years 3 months ago
Power-Aware Speed Scaling in Processor Sharing Systems
—Energy use of computer communication systems has quickly become a vital design consideration. One effective method for reducing energy consumption is dynamic speed scaling, whic...
Adam Wierman, Lachlan L. H. Andrew, Ao Tang